Samsung S3C2410

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Описание

Структурная схема микропроцессора
Структурная схема микропроцессора

S3C2410 16/32-bit RISC microprocessor is designed to provide a cost-effective, low-power, small die size and high-performance microcontroller solution for hand held devices and general mobile applications. To reduce total system cost, the S3C2410 also provides the following features: separate 16KB Instruction and 16KB Data Cache, MMU to handle virtual memory management, LCD controller (STN & TFT), NAND Flash Boot loader, System Manager (chip select logic, SDRAM controller), 3-ch UART with handshake, 4-ch DMA, 4-ch Timers with PWM, I/O Ports, RTC, 8- ch 10-bit ADC and touch screen interface, IIC-BUS interface, IIS-BUS interface, USB Host, USB Device, SD Host & Multimedia Card Interface, 2-ch SPI and PLL for clock generation. The S3C2410 is developed using an ARM920T core, 0.18um CMOS standard cells and a memory complier. Its low-power, simple, elegant and fully static design is particularly suitable for cost and power sensitive applications. Also, the S3C2410 adopts a new bus architecture, AMBA (Advanced Microcontroller Bus Architecture) An outstanding feature of the S3C2410 is its CPU core, a 16/32-bit ARM920T RISC processor designed by Advanced RISC Machines, Ltd. By providing a complete set of common system peripherals, the S3C2410 minimizes overall system costs and eliminates the need to configure additional components.

S3C2440 работает на частоте 300/400MHz. Он полностью аналогичен S3C2410, но вдобавок имеет интерфейс для камеры.

Особенности

  1. ARM920T CPU Core
    • 64-way set-associative cache with I-Cache(16KB) and D-Cache(16KB)
    • Write-through and Write-back cache operation
    • MMU supports MS WinCE, LINUX, Palm OS and Symbian.
    • Internal AMBA bus architecture
  2. System Manager
    • Little/Big-Endian support
    • Address space : Total 1GB
    • NOR/Strata Flash, ROM, SRAM, and SDRAM
    • NAND Flash Bootloader
  3. On-chip Peripherals
    • Power management
      • Normal, Idle, Slow & Power-off
      • 4-ch 16 bit PWM ( Pulse Width Modulation), & 1-ch 16-bit timer for OS
    • RTC : 32.768 KHz, alarm interrupt
    • GPIO :117 (multiplexed I/O)
    • 3-ch UARTs
    • 4 ch DMA Controllers
    • 8-ch 10-bit A/D (Max. 500KSPS), including TSP Controller
    • TFT LCD/STN LCD Controller (16bit, 640x480 maximum)
    • 16-bit Watch-dog Timer
    • 1-ch IIC-Bus Interface
    • IIS-Bus Interface
    • Screen Size: up to 640 x 480
    • 2-ch SPI (Synchronous Serial I/O)
    • SD Host/MMC (Multi Media Card) Interface
    • USB Host/Device Interface (1-ch. dedicated host & 1-ch. selective host/device)
      • 2-ch USB Host Interfaces
      OR
      • 1-ch USB Host and 1-ch USB Device Interface (12Mbps)
    • Debug & TEST
    • NAND Flash Controller (4KB internal buffer)
    • 24-ch external interrupts Controller (Wake-up source 16-ch)
  4. Operating Conditions
    • Internal: 1.8V/2.0V
    • External I/O : 3.3V
    • Speed : 203MHz@1.8V (3.0/3.3V memory interface)
    • 266MHz@2.0V (3.3V memory interface)
    • Memory Interface : 3.0V/3.3V
  5. Package - 272 FPBGA 14 x 14

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